REPORT "Error in overflow bit when 0+0=0=00000000" REPORT "Error in overflow bit when 0-0=0=00000000" Signal o_flow : STD_LOGIC - internal overflow signal so I can read it in the processĬell_0: bitAdder port map(a(0), b(0), cin, add_sub, temp_sum(0), carry(0)) Ĭell_i: bitAdder port map(a(i), b(i), carry(i-1), add_sub, temp_sum(i), carry(i)) Signal temp_sum : STD_LOGIC_VECTOR (WIDTH-1 downto 0)
Signal carry : STD_LOGIC_VECTOR (WIDTH-1 downto 0) - hold the carry outs from the adders
Y : OUT STD_LOGIC_VECTOR(WIDTH-1 downto 0) ĪRCHITECTURE behavior OF ripple_adder_subtracter_saturate is Port (a : IN STD_LOGIC_VECTOR(WIDTH-1 downto 0) ī : IN STD_LOGIC_VECTOR(WIDTH-1 downto 0) Here's how my implementation with overflow detection and saturation control: LIBRARY IEEE Įntity ripple_adder_subtracter_saturate is The adder is working as it should but the subtractor isn't and I can't really see what the problem is since I've checked the expression and it is correct, but when I simulate it seems like the subtraction part isn't working at all.
Hello I'm trying to implement a N-bit adder/subtractor in VHDL but I'm not getting it to work properly for some reason and I can't seem to find what the problem is.
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